Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx9
Project ID (random number) 33d334e8c9bc4d179701815fc7581a95.B8319B2A36C44AF8BF4904799C21460D.3 Target Package: csg324
Registration ID __0_0_0 Target Speed: -3
Date Generated 2016-01-21T23:10:17 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i7 CPU 950 @ 3.07GHz CPU Speed 3070 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i7 CPU 950 @ 3.07GHz CPU Speed 3070 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=3
  • 21-bit subtractor=1
  • 4-bit subtractor=1
  • 8-bit adder=1
Counters=1
  • 27-bit down counter=1
FSMs=2 Multiplexers=33
  • 1-bit 2-to-1 multiplexer=1
  • 18-bit 2-to-1 multiplexer=1
  • 19-bit 2-to-1 multiplexer=1
  • 21-bit 2-to-1 multiplexer=20
  • 4-bit 2-to-1 multiplexer=10
RAMs=1
  • 8x45-bit single-port distributed Read Only RAM=1
Registers=26
  • Flip-Flops=26
MiscellaneousStatistics
  • AGG_BONDED_IO=8
  • AGG_IO=8
  • AGG_LOCED_IO=8
  • AGG_SLICE=62
  • NUM_BONDED_IOB=8
  • NUM_BSFULL=66
  • NUM_BSLUTONLY=118
  • NUM_BSREGONLY=4
  • NUM_BSUSED=188
  • NUM_BUFG=1
  • NUM_LOCED_IOB=8
  • NUM_LOGIC_O5ANDO6=55
  • NUM_LOGIC_O5ONLY=2
  • NUM_LOGIC_O6ONLY=127
  • NUM_LUT_RT_O6=2
  • NUM_SLICEL=17
  • NUM_SLICEX=45
  • NUM_SLICE_CARRY4=13
  • NUM_SLICE_CONTROLSET=4
  • NUM_SLICE_CYINIT=243
  • NUM_SLICE_F7MUX=4
  • NUM_SLICE_FF=70
  • NUM_SLICE_UNUSEDCTRL=37
  • NUM_UNUSABLE_FF_BELS=18
NetStatistics
  • NumNets_Active=229
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=1
  • NumNodesOfType_Active_BOUNCEIN=28
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=2
  • NumNodesOfType_Active_CLKPIN=25
  • NumNodesOfType_Active_CLKPINFEED=2
  • NumNodesOfType_Active_CNTRLPIN=8
  • NumNodesOfType_Active_DOUBLE=202
  • NumNodesOfType_Active_GENERIC=7
  • NumNodesOfType_Active_GLOBAL=15
  • NumNodesOfType_Active_INPUT=12
  • NumNodesOfType_Active_IOBIN2OUT=6
  • NumNodesOfType_Active_IOBOUTPUT=6
  • NumNodesOfType_Active_LUTINPUT=783
  • NumNodesOfType_Active_OUTBOUND=210
  • NumNodesOfType_Active_OUTPUT=229
  • NumNodesOfType_Active_PADINPUT=6
  • NumNodesOfType_Active_PADOUTPUT=1
  • NumNodesOfType_Active_PINBOUNCE=94
  • NumNodesOfType_Active_PINFEED=816
  • NumNodesOfType_Active_QUAD=30
  • NumNodesOfType_Active_REGINPUT=14
  • NumNodesOfType_Active_SINGLE=318
  • NumNodesOfType_Vcc_HVCCOUT=21
  • NumNodesOfType_Vcc_LUTINPUT=57
  • NumNodesOfType_Vcc_PINFEED=57
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=4
  • IOB-IOBS=4
  • SLICEL-SLICEM=17
  • SLICEX-SLICEL=11
  • SLICEX-SLICEM=5
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=13
  • HARD1=2
  • IOB=8
  • IOB_IMUX=1
  • IOB_INBUF=1
  • IOB_OUTBUF=7
  • LUT5=57
  • LUT6=184
  • PAD=8
  • REG_SR=70
  • SELMUX2_1=4
  • SLICEL=17
  • SLICEX=45
 
Configuration Data
IOB_OUTBUF
  • DRIVEATTRBOX=[8:7]
  • SLEW=[FAST:7]
  • SUSPEND=[3STATE:7]
REG_SR
  • CK=[CK:70] [CK_INV:0]
  • LATCH_OR_FF=[FF:70]
  • SRINIT=[SRINIT0:66] [SRINIT1:4]
  • SYNC_ATTR=[ASYNC:68] [SYNC:2]
SLICEL
  • CLK=[CLK:3] [CLK_INV:0]
SLICEX
  • CLK=[CLK:22] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=11
  • CO3=11
  • CYINIT=2
  • DI0=12
  • DI1=12
  • DI2=11
  • DI3=11
  • O0=13
  • O1=12
  • O2=12
  • O3=11
  • S0=13
  • S1=12
  • S2=12
  • S3=11
HARD1
  • 1=2
IOB
  • I=1
  • O=7
  • PAD=8
IOB_IMUX
  • I=1
  • OUT=1
IOB_INBUF
  • OUT=1
  • PAD=1
IOB_OUTBUF
  • IN=7
  • OUT=7
LUT5
  • A1=6
  • A2=8
  • A3=10
  • A4=7
  • A5=8
  • O5=57
LUT6
  • A1=98
  • A2=114
  • A3=123
  • A4=132
  • A5=182
  • A6=184
  • O6=184
PAD
  • PAD=8
REG_SR
  • CE=22
  • CK=70
  • D=70
  • Q=70
  • SR=2
SELMUX2_1
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
SLICEL
  • A=3
  • A1=2
  • A2=2
  • A3=2
  • A4=3
  • A5=15
  • A6=16
  • AMUX=13
  • AQ=2
  • AX=1
  • B=1
  • B5=13
  • B6=13
  • BMUX=12
  • BQ=2
  • BX=2
  • C1=3
  • C2=4
  • C3=4
  • C4=4
  • C5=15
  • C6=16
  • CIN=11
  • CLK=3
  • CMUX=15
  • COUT=11
  • CQ=1
  • CX=4
  • D1=2
  • D2=3
  • D3=3
  • D4=3
  • D5=15
  • D6=15
  • DMUX=11
SLICEX
  • A=29
  • A1=32
  • A2=35
  • A3=39
  • A4=40
  • A5=42
  • A6=42
  • AMUX=6
  • AQ=19
  • AX=5
  • B=12
  • B1=17
  • B2=20
  • B3=22
  • B4=26
  • B5=26
  • B6=26
  • BMUX=2
  • BQ=16
  • BX=1
  • C=16
  • C1=24
  • C2=28
  • C3=28
  • C4=28
  • C5=28
  • C6=28
  • CE=7
  • CLK=22
  • CMUX=1
  • CQ=15
  • D=15
  • D1=22
  • D2=24
  • D3=26
  • D4=28
  • D5=28
  • D6=28
  • DMUX=2
  • DQ=15
  • DX=1
  • SR=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -filter <ise_file>
  • ngdbuild -filter <ise_file> -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • map -filter <ise_file> -intstyle ise -p xc6slx9-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -filter <ise_file> -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -filter <fname>.filter -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -filter <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -filter <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -filter <ise_file>
  • ngdbuild -filter <ise_file> -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • map -filter <ise_file> -intstyle ise -p xc6slx9-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -filter <ise_file> -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -filter <fname>.filter -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -filter <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -filter <ise_file>
  • ngdbuild -filter <ise_file> -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-csg324-3 <fname>.ngc <fname>.ngd
  • map -filter <ise_file> -intstyle ise -p xc6slx9-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -filter <ise_file> -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -filter <fname>.filter -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -filter <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
arwz 49 49 0 0 0 0 0
bitgen 299 298 0 0 0 0 0
compxlib 1 1 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
elfcheck 8 8 0 0 0 0 0
libgen 9 8 0 0 0 0 0
map 396 352 0 0 0 0 0
netgen 15 15 0 0 0 0 0
ngc2edif 14 14 0 0 0 0 0
ngcbuild 26 26 0 0 0 0 0
ngdbuild 439 427 0 0 0 0 0
obngc 2 2 0 0 0 0 0
par 351 351 0 0 0 0 0
platgen 3 2 0 0 0 0 0
psf2Edward 2 2 0 0 0 0 0
simgen 1 1 0 0 0 0 0
trce 349 349 0 0 0 0 0
xdsgen 2 2 0 0 0 0 0
xps 9 9 0 0 0 0 0
xps_archiver 1 1 0 0 0 0 0
xst 959 955 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_adding_source_files.htm ( 1 ) /doc/usenglish/isehelp/pn_db_design_view_properties.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_define_hdl_module.htm ( 3 ) /doc/usenglish/isehelp/pn_db_nsw_select_source_type.htm ( 1 )
/doc/usenglish/isehelp/sse_c_considerations.htm ( 1 ) /doc/usenglish/isehelp/sse_c_files.htm ( 1 )
/doc/usenglish/isehelp/sse_c_overview.htm ( 1 ) /doc/usenglish/isehelp/sse_c_symbols.htm ( 1 )
/doc/usenglish/isehelp/sse_n_reserved_words.htm ( 1 ) /doc/usenglish/isehelp/sse_p_adding_buffer.htm ( 1 )
/doc/usenglish/isehelp/sse_p_adding_symbol.htm ( 1 ) /doc/usenglish/isehelp/sse_p_instantiating_clock_buffer.htm ( 1 )
/doc/usenglish/wizards/arwz/awz_db_dcmgen.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=true PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_ProjectDescription=A simple project to show how the Numato Labs LCD Expansion PCB can be controlled with the Mimas V2 Development board using VHDL from OpenCores!
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2016-01-19T22:20:42 PROP_intWbtProjectID=B8319B2A36C44AF8BF4904799C21460D
PROP_intWbtProjectIteration=3 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan6
PROP_xilxBitgCfg_GenOpt_BinaryFile=true PROP_DevDevice=xc6slx9
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=VHDL FILE_UCF=1
FILE_VHDL=2
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=46 NGDBUILD_NUM_FDE=22 NGDBUILD_NUM_FDR=2
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_INV=46 NGDBUILD_NUM_LUT1=2 NGDBUILD_NUM_LUT2=10
NGDBUILD_NUM_LUT3=14 NGDBUILD_NUM_LUT4=12 NGDBUILD_NUM_LUT5=20 NGDBUILD_NUM_LUT6=95
NGDBUILD_NUM_MUXCY=46 NGDBUILD_NUM_MUXF7=4 NGDBUILD_NUM_OBUF=7 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=48
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FD=46 NGDBUILD_NUM_FDE=22 NGDBUILD_NUM_FDR=2
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=46 NGDBUILD_NUM_LUT1=2
NGDBUILD_NUM_LUT2=10 NGDBUILD_NUM_LUT3=14 NGDBUILD_NUM_LUT4=12 NGDBUILD_NUM_LUT5=20
NGDBUILD_NUM_LUT6=95 NGDBUILD_NUM_MUXCY=46 NGDBUILD_NUM_MUXF7=4 NGDBUILD_NUM_OBUF=7
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=48
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5