Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx45t
Project ID (random number) d37d432218324b86a422f84c7c20b544.D8E8884C262640F3B5EEE781BFC45521.6 Target Package: fgg484
Registration ID __0_0_0 Target Speed: -3
Date Generated 2017-08-29T14:49:12 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i3-4130 CPU @ 3.40GHz CPU Speed 3399 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i3-4130 CPU @ 3.40GHz CPU Speed 3399 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=2
  • AGG_IO=2
  • AGG_LOCED_IO=2
  • NUM_BONDED_IOB=2
  • NUM_LOCED_IOB=2
NetStatistics
  • NumNets_Active=3
  • NumNodesOfType_Active_DOUBLE=2
  • NumNodesOfType_Active_GENERIC=3
  • NumNodesOfType_Active_IOBIN2OUT=2
  • NumNodesOfType_Active_IOBOUTPUT=2
  • NumNodesOfType_Active_OUTBOUND=2
  • NumNodesOfType_Active_PADINPUT=1
  • NumNodesOfType_Active_PADOUTPUT=1
  • NumNodesOfType_Active_PINFEED=1
  • NumNodesOfType_Active_QUAD=32
  • NumNodesOfType_Active_SINGLE=1
SiteStatistics
  • IOB-IOBM=1
  • IOB-IOBS=1
SiteSummary
  • IOB=2
  • IOB_IMUX=1
  • IOB_INBUF=1
  • IOB_OUTBUF=1
  • PAD=2
  • PULL_OR_KEEP1=1
 
Configuration Data
IOB_OUTBUF
  • DRIVEATTRBOX=[8:1]
  • SLEW=[FAST:1]
  • SUSPEND=[3STATE:1]
PULL_OR_KEEP1
  • PULLTYPE=[PULLUP:1]
 
Pin Data
IOB
  • I=1
  • O=1
  • PAD=2
IOB_IMUX
  • I=1
  • OUT=1
IOB_INBUF
  • OUT=1
  • PAD=1
IOB_OUTBUF
  • IN=1
  • OUT=1
PAD
  • PAD=2
PULL_OR_KEEP1
  • PAD=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 276 212 0 0 0 0 0
arwz 74 73 0 0 0 0 0
bitgen 1285 1255 0 0 0 0 0
bitinit 2 2 0 0 0 0 0
cse_server 27 27 0 0 0 0 0
elfcheck 1183 1174 0 0 0 0 0
libgen 187 187 0 0 0 0 0
map 1500 1336 0 0 0 0 0
netgen 2 2 0 0 0 0 0
ngc2edif 7 7 0 0 0 0 0
ngcbuild 1122 1119 0 0 0 0 0
ngdbuild 1626 1622 0 0 0 0 0
par 1334 1329 0 0 0 0 0
platgen 659 351 0 0 0 0 0
psf2Edward 56 56 0 0 0 0 0
simgen 1 1 0 0 0 0 0
trce 1308 1308 0 0 0 0 0
xdsgen 55 55 0 0 0 0 0
xps 457 429 0 0 0 0 0
xst 4326 4284 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/cgn_c_overview.htm ( 1 ) /doc/usenglish/isehelp/cgn_p_create_custom_core.htm ( 3 )
/doc/usenglish/isehelp/ise_c_comparing_projects.htm ( 1 ) /doc/usenglish/isehelp/ise_c_debugging_strategies_chipscope_pro.htm ( 1 )
/doc/usenglish/isehelp/ise_c_migrating_ise_projects.htm ( 1 ) /doc/usenglish/isehelp/ise_c_process_analyze_design_using_chipscope.htm ( 1 )
/doc/usenglish/isehelp/ise_c_project_browser.htm ( 1 ) /doc/usenglish/isehelp/ise_c_project_copy.htm ( 1 )
/doc/usenglish/isehelp/ise_c_understanding_ise_project.htm ( 1 ) /doc/usenglish/isehelp/ise_p_creating_a_project.htm ( 1 )
/doc/usenglish/isehelp/ise_p_open_ise_example.htm ( 1 ) /doc/usenglish/isehelp/ise_p_running_chipscope_pro_inserter.htm ( 1 )
/doc/usenglish/isehelp/ise_r_ref_hdl_schematic_conventions.htm ( 1 ) /doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_summary.htm ( 1 ) /doc/usenglish/isehelp/sse_c_considerations.htm ( 3 )
/doc/usenglish/isehelp/sse_c_files.htm ( 3 ) /doc/usenglish/isehelp/sse_c_overview.htm ( 3 )
/doc/usenglish/platform_studio/ps_c_bsb_adding_configuring_peripherals.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_bsb_creating_new_project_bsb.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_creating_new_peripherals.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_define_fslbus_interface_settings.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_edk_design_flow_for_opb_plb_peripherals.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_edk_design_for_flow_fsl_peripherals.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_hdl_analysis.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_hdl_source_files.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_identifying_bus_interface_ports_and_parameters.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_identifying_physical_location_peripheral.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_ipif_configuration_options.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_selecting_axi_ipif_services.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_selecting_bus_interface.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_selecting_ipif_services.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_setting_driver.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_source_file_types.htm ( 1 )
/doc/usenglish/platform_studio/ps_c_ipw_starting_cip_wizard.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_ipw_using_create_import_ip_wizard.htm ( 1 )
/doc/usenglish/platform_studio/ps_p_ipw_editing_the_hdl_source_files_list.htm ( 1 ) /doc/usenglish/platform_studio/ps_p_ipw_identifying_module_and_version.htm ( 1 )
/doc/usenglish/platform_studio/ps_p_ipw_selecting_fsl_bus_interfaces.htm ( 1 ) /doc/usenglish/platform_studio/ps_p_ipw_selecting_opb_plb_bus_interfaces.htm ( 1 )
/doc/usenglish/platform_studio/ps_p_ipw_storing_peripheral_in_edk_user_repository.htm ( 1 ) /doc/usenglish/platform_studio/ps_r_gst_whatsnew.htm ( 1 )
/doc/usenglish/platform_studio/ps_r_ipw_bus_interfaces.htm ( 1 ) /doc/usenglish/platform_studio/ps_r_ipw_ipif_features.htm ( 1 )
/doc/usenglish/platform_studio/ps_r_ipw_ipif_features_axi.htm ( 1 ) /doc/usenglish/platform_studio/ps_r_ipw_organization_of_generated_files.htm ( 1 )
/doc/usenglish/wizards/arwz/awz_db_dcmadv.htm ( 1 ) /doc/usenglish/wizards/arwz/awz_db_dcmclkbuf.htm ( 1 )
/doc/usenglish/wizards/arwz/awz_db_dcmgen.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2017-08-29T14:38:15
PROP_intWbtProjectID=D8E8884C262640F3B5EEE781BFC45521 PROP_intWbtProjectIteration=6
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx45t PROP_DevFamilyPMName=spartan6
PROP_DevPackage=fgg484 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-3 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=1
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_OBUF=1
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_PULLUP=1
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx45t-3-fgg484
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5