Hi, I was testing this example (Learning FPGA And Verilog A Beginner’s Guide Part 6 – DDR SDRAM) on MIMAS V2. I followed all the steps till "Building And Testing The Program" Step 1, where data2mem gives me strange error: Code: C:\Users\engineer22\Desktop\thngttr\xilinx\CDMemoryTest\common2>data2mem -bm HelloWorld_bd.bmm -bd HelloWorld.elf -bt HelloWorld.bit ERROR:Data2MEM:33 - Matching ADDRESS_SPACE for code segment #1 not found in 'HelloWorld_bd.bmm'. Code segment #1 occupies [0xA4000000:0xA4000A59] (I named projects named "ddrdemo" in tutorial as "HelloWorld"). I searched throught Xilinx and Numato Forums and just Google search, but all advice i found was to change linker script for .elf file. But change how? And why does this error occur at all for this tutorial?
Hello thngttr, Please refer this page http://www.xilinx.com/support/docum...SDK_Doc/reference/sdk_u_linker_script_mod.htm You need to change all the sections from DDR to BRAM. Thanks, Rohith
