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Problem with AD9283 ADC Expansion module

Discussion in 'Expansion Modules & Breakout Bords' started by Andreas Bengtsson, Oct 25, 2015.

  1. Andreas Bengtsson

    Andreas Bengtsson New Member

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    Dear all,

    I have a Mimas V2 Spartan 6 FPGA board with the AD9283 ADC Expansion module. It seems that I can read data from the ADC, but with the two inputs shorted, I read a value of roughly 7 from the adc, and according to the data sheet of AD9283 that corresponds to -480 mV or so. If I apply the a voltage across the two inputs I instead read 16-17 from the ADC, independent of the value and sign of the applied voltage.

    Could there be something faulty with the board, or am I doing something wrong?

    This is my simple code to read it out:

    Code:
    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.NUMERIC_STD.ALL;
    
    entity top_adc is
        Port ( Clk12MHz : in  STD_LOGIC;
               adc_data : in  STD_LOGIC_VECTOR (7 downto 0);
               adc_enable : out  STD_LOGIC;
                  adc_pwrdown : out STD_LOGIC;
                  LED : out STD_LOGIC_VECTOR (7 downto 0);
                  reset : in std_logic);
    end top_adc;
    
    
    
    architecture Behavioral of top_adc is
    
    
    component divider is
    Generic (FACTOR : integer);
    Port (clk_12MHz : in  STD_LOGIC;
          clk_out : out  STD_LOGIC;
          reset : in  STD_LOGIC);
    end component;
    
    
    signal tmp : unsigned(7 downto 0) := (others => '0');
    signal Clk2Hz : std_logic := '0';
    
    begin
    divider_inst: divider generic map(12e6/2) PORT MAP(Clk12MHz,Clk2Hz,Reset);
    
    -- Route the clock to the ADC
    adc_enable <= Clk12MHz;
    
    -- Don't power down
    adc_pwrdown <= '0';
    
    -- Register the incoming data right away
    tmp <= unsigned(adc_data);
    
    
    process(Clk2Hz)
    begin
        if rising_edge(Clk2Hz) then
            LED <= std_logic_vector(tmp);
        end if;
    end process;
    
    
    end Behavioral;
    
    
    
    Best regards,
    Andreas
     
  2. admin

    admin Administrator Staff Member

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    Hi Andreas,

    To my understanding, what you are seeing is expected. All ADCs do have some amount of offset which varies chip to chip. We had a communication with Analog Devices on this matter and they had confirmed that there is some offset (something that was quite larger than we expected). I don't specifically remember the exact number at the moment but I will search old emails and see if I can find that out.

    Thanks,
    Tom
    Numato Lab
     

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