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[Resolved] Is it possible to speak with the SPI flash on the mimas V2 using the FPGA

Discussion in 'FPGA Boards' started by shachy12, Jun 19, 2017.

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  1. shachy12

    shachy12 New Member

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    Hey,

    I noticed that the SPI flash used on the mimas V2 to store the fpga configuration has a lot of free space.

    I saw the following lines in the User Constraints File:
    Code:
        NET "SDI"                        LOC = T13     | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;  #MOSI  # IO_L3N_MOSI_CSI_B_MISO0_2     Sch = SI 
        NET "SDO"                        LOC = R13     | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;  #MISO  # IO_L3P_D0_DIN_MISO_MISO1_2    Sch = SO
        NET "SCLK"                       LOC = R15     | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;  #SCK   # IO_L1P_CCLK_2                 Sch = SCK
        NET "CS"                         LOC = V3      | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;  #CS    # IO_L65N_CSO_B_2               Sch = CS
    
    I couldn't help but wonder if the fpga is able to speak with the flash using SPI.
    The only problem is that as far as I know SPI doesn't support 2 masters.

    Does anybody know if it is possible?

    Thanks in advance for the help.
     
  2. rohith

    rohith Moderator Staff Member

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    Hi sachy12,

    Yes, we can use the free space in SPI Flash on MimasV2 to store custom data. After FPGA has booted (configured) from the SPI Flash, it relinquishes control over SPI lines. Users can now use those pins as any normal GPIO, and that includes using them as SPI pins. In fact we did a project where we stored a custom bootloader (along with Linux kernel) in the free region of SPI Flash to load linux kernel from SPI Flash to DDR and boot it.

    So, yeah its possible! User just need to make sure not to corrupt the region where bitstream is stored. Everything else should be fine.

    Thanks!
     
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