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[Solved] Memory Controller?

Discussion in 'FPGA Boards' started by Matthew Palmer, Apr 18, 2015.

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  1. Matthew Palmer

    Matthew Palmer New Member

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    Hello.

    Before my Mimas V2 arrives, I'm wondering if you could recommend a memory controller for the LPDDR ram? Any good ones in VHDL? Just want to get things prepared.

    Cheers,

    Matt.
     
    Matthew Palmer, Apr 18, 2015
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  2. admin

    admin Administrator Staff Member

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    Hello Matt,

    You can use Xilinx's MIG (Memory Interface Generator) to generate memory controller wrapper for Mimas V2. The link below is the official documentation from Xilinx.

    http://www.xilinx.com/support/documentation/ip_documentation/ug086.pdf

    It can be a little time consuming to get everything working just by reading UG086. So you may want to refer to the following tutorials as well. Though they are originally written for Saturn, the basic principles are equally applicable to Mimas V2 as well (Both Saturn and Mimas V2 uses the same LPDDR).

    http://numato.cc/content/spartan6-and-ddr-sdram-memory-your-first-ddr-interfacing-project
    http://numato.cc/content/creating-x...rst-microblaze-processor-based-embedded-desig

    Thanks,
    Tom
     
    admin, Apr 19, 2015
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  3. Matthew Palmer

    Matthew Palmer New Member

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    That's great help. I can't believe I was never aware of the MIG before now... Will try it out.

    Thanks,
    Matt.
     
    Matthew Palmer, Apr 20, 2015
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