Hello, I am trying to create a design in Saturn V3 Development board with Spartan6 LX45. The design is composed of one Microblaze and several VDHL cores. Design is done though ISE Design Suite 14.7 adding microblaze design as a source file. To load program in Saturn flash for configuration after reset, I am having troubles to merge .elf and .bmm into the same bitstream with data2mem tool. I have configured linker script to point all sections to LPDDR memory, but when I try to merge files with data2mem tool, i get this error: ERRORata2MEM:33 - Matching ADDRESS_SPACE for code segment #1 not found in 'edkBmmFile_bd.bmm'. Code segment #1 occupies [0xA4000000:0xA402693B]. This is the first time I try to load bitstream in Flash memory so up to this moment, I havent had to "fight" with linker script because the one created automatically by SDK was ok. I was reading possible solutions to solve ERROR 33, for example, point all sections to BRAM instead of DDR, but if I do that, what i get is the following: region `microblaze_0_i_bram_ctrl_microblaze_0_d_bram_ctrl' overflowed by 133756 bytes So it seems there is not enough space in Block ram to save code during initial configuration. So my question is, what do I have to do to allow pointing linker scritps sections to DDR memory avoiding this error in data2mem tool? What do I have to change to allow save data in DDR during initial configuration from flash? It seems Changing linker script to point sections to block ram is not possible because of the size of sections. So I understand that in Linker Script I have to point all sections to DDR memory, and change something in .bmm file, but what??? Maybe I am wrong and the changes must be done in other file., or on the contrary, there is no solution for this. Sorry because it is the first time I do this, and it is being complicated to understand what is wrong. Attached you cand find my .bmm file and the .elf file. Extensions have been changed to .txt to be able to upload them in the forum. Any help is really appreciated. Regards. As extra information I attach sections size obtained in SDK log: mb-size HAS2_SaturnVersion.elf |tee "HAS2_SaturnVersion.elf.size" text data bss dec hex filename 158028 1736 803172 962936 eb178 HAS2_SaturnVersion.elf
Hi @Alejandro Lopez, Issue here is that, Bitstream file can only contain the BRAM data which makes sense since it is not possible to fit, for example, 256MB of DDR2 contents in the bitstream itself, and also because DDR2 is outside of FPGA, whereas BRAM are inside FPGA and thus can be initialized. So, data2mem fails if your elf code contains any code in the LPDDR region. Now issue is: 1. Your current code cannot fit completely in the BRAM because it is too big. 2. For this you have move your code to LPDDR, but then, you will not be able to create a bootable .bitstream. The solution t0 this problem is to use a bootloader. It will be a very small program whose sole task would be to copy your program from SPI flash to the LPDDR and then start its execution. And this small bootloader can very well fit into the SPI flash. This article might help you: https://numato.com/kb/saturn-microb...n-linux-saturn-spartan-6-fpga-module-part-iv/ In that article, there is a small bootloader which copies Linux kernel from SPI flash to DDR and then boots it. Your use-case is similar and the same bootloader code should work well after suitable modifications. Thanks, Rohit
Many thanks for your answer Rohit. I found the document you point me yesterday, just after open the topic. I am working in understanding how it works. Hope to have time to test it today. If all works fine, i will post it. Thanks again.
Ok, i have been taking a look on complete series of documents to create a Linux based system on Saturn. Now I have new questions. My design is composed of one Microblaze and some VHDL cores created by me. I have to create a bitstream through ISE, not through XPS. So I would have one .bit(or .bin) as output from ISE. Well, to create bootloader, a Microblaze design with SPI, timer, LPDDR and so on is also required according to the documents related. So my questions are: 1. Do I have to create two different bitstreams?? One with my design (VHDL cores + Microblaze), and other one with other Microblaze with SPI, timer, etc) ?? Or on the contrary, do I have to add only these peripherals required for bootloader in my Microblaze design, and only generate one bitstream?? 2. In case of two bitstreams are required, how do I merge two bitstreams into one "master" bitstream (because I will have one bitstream with my design, and other one with the bootloader). In addition, I will have two .elf files. One for Microblaze present in my design, and one more for Microblaze used for bootloader. How do I merge (apart from two bitstreams) two .elf files?? I am sorry, because it is my first time doing it and I have lot of doubts. Thanks for all the support. Regards.
