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Saturn Spartan6 invalid constraints

Discussion in 'FPGA Boards' started by Glen Garner, Jun 1, 2016.

  1. Glen Garner

    Glen Garner New Member

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    I am working with a Saturn Spartan6 dev board with the LX45 version of the FPGA. I've been getting a number of errors stating that the specified GPIO in the UCF file does not actually exist on the part (see error message below). I've made sure to set the correct part (XC6SLX45), package (CSG324), and speed grade (2) in the Design Properties. I've also tried bypassing the error by setting the environment variable, which results in a successful compilation, but the GPIO still doesn't work. Any suggestions?

    ERROR:MapLib:30 - LOC constraint F7 on ftw_out<21> is invalid: No such site on
    the device. To bypass this error set the environment variable
    'XIL_MAP_LOCWARN'.
     
  2. Rean

    Rean New Member

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    Hi~

    I got the same problem, too.

    I bought this board last week, before receiving it I created a project for trial run, then I got the same message.

    I print the pinout report of ISE 14.7, check the NC pin of P3, there are several NC pins in P3 without comment, as below,

    P3-39~P3-42, P3-45, P3-46, P3-53, P3-54, P3-65~P3-68, P3-73 and P3-74

    The data sheet shows these pins are valid but the ISE says they are NCs, skip those pins may keep the design correctness.

    BRs,
     
  3. rohith

    rohith Moderator Staff Member

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  4. Rean

    Rean New Member

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    Dear Rohith,

    My negligence, thanks. :)
     

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